A so-called trench gate structure in which a trench is formed in a semiconductor substrate and a gate electrode is formed in the trench is applied to semiconductor devices such as IGBTs (Insulated Gate Bipolar Transistor), MISFETs, and is especially advantages in application to electric power sources (see Japanese Patent Application Laid Open Publication No. 2001-85685A, for example).
FIG. 12 is a section showing a semiconductor device of a conventional trench gate MISFET. In the trench gate MISFET shown in FIG. 12, a N−-type drain layer 112 made of a N-type epitaxial layer and a P-type body region 113 are formed in this order on a N+-type silicon substrate 111. Further, trenches 113 are formed in the P-type body region 113 so as to pass through the P-type body region 113 and so that each bottom thereof reaches the N−-type drain layer 112. A pair of N+-type source regions 114, each of which is in contact with a corresponding trench 116, are formed in the upper part of the P-type body region 113 interposed between the two trenches 116, and a P+-type diffusion region 115 is formed at a part interposed between the pair of N+-type source regions 114 in the upper part of the P-type body region 113. The N+-type source regions 114 and the P+-type diffusion region 115 are formed so as not to reach the N−-type drain layer 112.
In each trench 116, a gate electrode 118 made of polysilicon is filled, with a gate insulating film 117 intervened. A cap oxide film 119 and an insulating film 120 made of PSG (Phospho Silicate Glass) are formed on the gate electrode 118. A source electrode film 121 is formed on the N+-type source regions 114, the P+-type diffusion region 115 and the insulating film 120.